From 86691868eaa3898276a9cd440133b3e2d9b34f00 Mon Sep 17 00:00:00 2001 From: Thomas Kolb Date: Wed, 4 Jan 2023 22:28:43 +0100 Subject: [PATCH] DMA changes; still not working --- src/main.rs | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/src/main.rs b/src/main.rs index 6c45033..5ac4e64 100644 --- a/src/main.rs +++ b/src/main.rs @@ -54,10 +54,9 @@ const HIGH: u16 = 25000; /// if your board has a different frequency const XTAL_FREQ_HZ: u32 = 12_000_000u32; -fn get_adc_channel_blocking(dma: &hal::dma::Channels, spi: &mut rp2040_hal::Spi, cs_pin: &dyn embedded_hal::digital::v2::OutputPin) -> u16 +fn get_adc_channel_blocking(dma: &hal::dma::Channels, spi: &mut BIDI, cs_pin: &dyn embedded_hal::digital::v2::OutputPin) -> u16 where - S: hal::spi::State, - D: hal::spi::SpiDevice, + BIDI: hal::dma::ReadTarget + hal::dma::WriteTarget, E: core::fmt::Debug { let mut tx_buf: [u8; 3] = [0x06, 0x40, 0x00]; @@ -67,7 +66,7 @@ where cs_pin.set_low().unwrap(); // Use BidirectionalConfig to simultaneously write to spi from tx_buf and read into rx_buf - let transfer = bidirectional::Config::new((dma.ch0, dma.ch1), &tx_buf, spi, &rx_buf).start(); + let transfer = bidirectional::Config::new((dma.ch0, dma.ch1), &tx_buf, spi, &mut rx_buf).start(); // Wait for both DMA channels to finish let ((_ch0, _ch1), tx_buf, _spi, rx_buf) = transfer.wait(); cs_pin.set_high().unwrap();