From 189ea810d968b8fa69a80b093967f96bae9ec2a0 Mon Sep 17 00:00:00 2001 From: Thomas Kolb Date: Sat, 12 Jun 2021 01:10:41 +0200 Subject: [PATCH] deepsleep: use libopencm3 functions instead of register access --- src/deepsleep.c | 24 ++++++++++-------------- src/main.c | 3 ++- 2 files changed, 12 insertions(+), 15 deletions(-) diff --git a/src/deepsleep.c b/src/deepsleep.c index 402b095..f626eb2 100644 --- a/src/deepsleep.c +++ b/src/deepsleep.c @@ -6,6 +6,7 @@ #include "clock.h" #include "deepsleep.h" +#include "libopencm3/stm32/f0/rcc.h" void init_rtc(void) { @@ -30,7 +31,7 @@ void init_rtc(void) /* ?! Stdperiph examples don't turn this on until _afterwards_ which * simply doesn't work. It must be on at least to be able to * configure it */ - RCC_BDCR |= RCC_BDCR_RTCEN; + rcc_enable_rtc_clock(); pwr_enable_backup_domain_write_protect(); @@ -43,13 +44,12 @@ void init_rtc(void) static void unlock_rtc_access(void) { pwr_disable_backup_domain_write_protect(); - RTC_WPR = 0xCA; - RTC_WPR = 0x53; + rtc_unlock(); } static void lock_rtc_access(void) { - RTC_WPR = 0xFF; + rtc_lock(); pwr_enable_backup_domain_write_protect(); } @@ -61,12 +61,8 @@ void deepsleep(uint32_t duration_secs) unlock_rtc_access(); // enter initialization mode - RTC_ISR |= RTC_ISR_INIT; - - // wait until initialization mode has been entered - while((RTC_ISR & RTC_ISR_INITF) != RTC_ISR_INITF) { - // do nothing - } + rtc_set_init_flag(); + rtc_wait_for_init_ready(); RTC_TR = 0; // 00:00:00 RTC_DR = // friday, 01.01.16 @@ -116,20 +112,20 @@ void deepsleep(uint32_t duration_secs) RTC_CR |= RTC_CR_ALRAE | RTC_CR_ALRAIE; // leave initialization mode - RTC_ISR &= ~RTC_ISR_INIT; + rtc_clear_init_flag(); // lock registers again (using invalid key) lock_rtc_access(); // enter deep sleep mode SCB_SCR |= SCB_SCR_SLEEPDEEP; - PWR_CR |= PWR_CR_LPDS; // voltage regulator low-power mode + pwr_voltage_regulator_low_power_in_stop(); pwr_set_stop_mode(); __WFI(); SCB_SCR &= ~SCB_SCR_SLEEPDEEP; // no deepsleep except in this function - rcc_periph_clock_disable(RCC_PWR); // no longer needed - rcc_osc_off(RCC_LSI); + //rcc_periph_clock_disable(RCC_PWR); // no longer needed + //rcc_osc_off(RCC_LSI); init_clock(); // ensure that all clocks are running again } diff --git a/src/main.c b/src/main.c index f427a72..49e5e39 100644 --- a/src/main.c +++ b/src/main.c @@ -223,8 +223,9 @@ int main(void) } else { // charge control already idle if((timebase_ms - charge_control_idle_since) > DEEPSLEEP_DELAY) { - rs485_enqueue("PWR:DEEPSLEEP"); + rs485_enqueue("PWR:DEEPSLEEP:ENTRY\n"); deepsleep(DEEPSLEEP_DURATION); + rs485_enqueue("PWR:DEEPSLEEP:EXIT\n"); charge_control_was_idle = false; } }